The present invention relates to a defect review method and apparatus for reviewing and classifying an image of a defect or the like occurring during manufacturing processes of a semiconductor wafer or the like.
Conventionally, in semiconductor wafer manufacture, an optical exposure process or method has been adapted as a circuit pattern transfer method. However, in recent years, as pattern integration has progressed, it has become difficult to form a fine mask pattern shape with fidelity on a wafer by use of the optical exposure method. As such, a method called “OPC” (optical proximity correction) has been widely used. Among other things, OPC is used to perform operations on integrated mask patterns, such as preliminarily addition of a graphic to a mask pattern, and corrects the size of a mask pattern corresponding to the density state of the mask pattern.
FIG. 4A shows a design layout of a circuit pattern. FIG. 4B shows an OPC mask. FIG. 4C shows an example of pattern formed on a wafer by using the OPC mask. In many cases, a design layout is configured from simple polygons, such as oblong rectangles. From the drawing figure, it can be known that corners of the layout have complex shapes corrected for layout patterns. When performing pattern correction by using the method of OPC, the operation of determining an OPC shape is performed. The operation is performed through pattern shape simulation by an exposure simulator or is performed by actually iteratively performing pattern transfer experiment so that the circuit pattern after corrected, that is, the circuit pattern to be transferred onto an actual wafer, becomes a desired circuit pattern.
In an ordinarily case, a step using the OPC is a step of forming a wiring at the level of several tens of nanometers. More specifically, in the step, for example, the wiring width of a wiring and the gap width between the wiring and a wire adjacent thereto are very small, and hence strict process control has to be carried out. In the case where an OPC correction is insufficient, a critical defect to the device is caused due to, for example, open-circuiting or short circuiting with the wirings (FIG. 4C shows an example of a short circuiting case). Hence, the OPC pattern design is an important task for manufacturing process development. The defect caused in a specific circuit portion of a wafer due to, for example, the circuit layout and the properties of pattern-forming equipment, such as the above-described pattern formation failure defect caused due to the OPC failure, is called “systematic defect.”
In the case, for example, a recently available exposure simulator is used, the shape of a transferred circuit pattern can be predicted to some extent. Hence, in the case where shape simulation is executed on the exposure simulator by inputting various exposure conditions, a portion with low probability of making it possible to obtain a desired pattern, i.e., a portion (hot spot) with high probability of causing the pattern formation failure defect can be predicted. In the case where it is evaluated whether an OPC pattern is appropriate through actual exposure experiment, an image analysis operation is carried out in the manner that an image of the hot spot portion is acquired by using a measuring or metrological SEM (scanning electron microscope) having a resolution of the level of several nanometers. When a large deviation occurs between a formed pattern and a desired pattern, a corresponding OPC pattern has to be corrected, and the OPC pattern is determined by iteration of the simulation, experiment, or the like.
Device mass production is carried out after completion of design of an OPC pattern such as described above. However, evaluation of a transfer pattern with respect to a target hot spot is not performed only in the design event of the OPC pattern, but also is important in the wafer mass production stage. This is because, when the pattern shape defect is caused due to the pattern failure as described above, there is a high probability that the defect is critical for the device, such that the pattern shape defect that can occurs with fluctuation in process condition has to be monitored. Japanese Unexamined Patent Application Publication No. 2006-126532 discloses a conventional technique relative to a review method for reviewing a predetermined evaluation portion, which is represented by the hot spot or the like. According to the publication, an acquired image is compared to design data, thereby to detect the occurrence of a pattern shape defect.
In a semiconductor device manufacturing line, there also occur random defects whose defect occurrence position is not dependent on the circuit pattern. The random defects include, for example, foreign particles and scratch defects occurring in a planarization process of the wafer. Even such a random defect can be a cause of reducing the production yield, such that a countermeasure therefor is necessary. Conventionally, there has been made a countermeasure using a wafer inspection tool and a review tool.
The wafer inspection tool is used to perform high speed checking for detecting a position of a defect on the wafer. The device automatically processes an image acquired by imaging the state of the wafer surface by using an optical device or an electron beam, thereby to check the presence or absence of a defect. In the case of the inspection tool, since the high speed feature is important, the amount of image data is minimized by maximizing the pixel size of the image being acquired (that is, resolution minimization). Hence, in many cases, while the presence of a defect can be evaluated from a detected low resolution image, the type of the defect cannot be determined therefrom.
However, the review tool is used to acquire and review an image a respective image detected by the inspection device in the state where the pixel size is reduced (that is, a high resolution image). The respective a defect is classified by a defect root cause and the occurrence frequency and tendency of the defect is checked. Thereby, analysis can be implemented to detect the type of the defect, and consequently, a countermeasure guide for production yield can be obtained. The functions for automatically performing the image acquisition function and the image classification function are, respectively, called an ADR (automatic defect review) function and an ADC (automatic defect classification) function, and review tool including these functions are put into commercial markets. In the recent semiconductor manufacturing process field where the integration further advances, there are cases where the defect size reaches the order of several tens of nanometers or less, so that review tool each using a scanning electron microscope (“review SEM,” herebelow) having a nanometer level resolution are widely used.
A conventional technique relative to, for example, the ADR and ADC provided in a review tool such as described above is disclosed in Japanese Unexamined Patent Application Publication No. 2001-331784. The publication describes, for example, the configuration of the review SEM, the functions and operation sequences of the ADR and ADC, and a method for displaying the acquired images and classification results.
As described above, defects reducing the semiconductor production yield are broadly classified as systematic defects and random defects. Conventionally, the former defects have been monitored by evaluating predetermined portions (“fixed point review,” herebelow), and the latter defects have been monitored by the combination of the inspection tool and the review tool. In this manner, the process monitoring and production yield management for the exposure step have been performed.
However, as integration further advances and hence frequent use of the OPC technique for mask patterns becomes an ordinary practice, the above-described conventional monitoring method is about to be insufficient as a production yield management method. More specifically, when the number of portions (hot spots) to be monitored on a chip is increased to the level of several thousands by frequent use of the OPC, it is practically impossible to monitor all the hotspots in a mass production line. When only several tens of the hot spots are evaluated, there can occur a case where shape defects are overlooked, therefore resulting in failure in the detection of the process fluctuation.
Recent inspection tool have been technically advanced to an extent of having high detection sensitivity. Hence, there has been installed in a mass production line a tool having the potential capability of detecting a defect having the size of several tens of nanometers, which is equivalent to the size of a systematic defect. However, in the case of the conventional review tool, the defect cannot be automatically designated to be a systematic defect from an image of the defect. As such, also from this point of view, the occurrence of the systematic defect cannot be efficiently detected.